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ISBN
:
9788131510032
Publisher
:
Delmar Cengage Learning
Subject
:
Others
Binding
:
Paperback
Pages
:
342
Year
:
2009
₹
350.0
₹
315.0
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This new book presents digital concepts incrementally and is a refreshing change from the texts that present principles too quickly and all at the same time. A perfect complement to recent technological advances resulting in affordable CPLD simulators, this book offers students valuable and applied exposure to CPLD and VHDL environments. Care has been taken to ensure that digital concepts are presented in a systematic and progressive format so that readers can gain confidence before being introduced to more advanced topics. CPLD technology minimizes the wiring and engineering complexities so that students are freed up to design and test advanced digital systems in shorter periods of time. Key Features Explanations of digital concepts give this lab manual the ability to stand on its own as a single source of information The 12 labs in the book help users understand what they are doing and feel confident, thereby creating a valuable, applied, and enjoyable learning experience The transition to the Altera laboratory package is affordable, permitting older, more costly TTL IC training kits to be discarded A back-of-book CD-ROM containing Power Point presentations and VHDL code allows users to review digital concepts in an animated environment About The Author Mr. Chartrand holds a Bachelor of Science degree in electrical engineering from Queen's university in Kingston Ontario. He has been teaching digital courses for 20 years at Niagara College in Welland , Ontario. Mr. Chartrand has made industry contributions with various designs including interfacing an infrared camera to a PC, creating a digital circuit board used as a PC training system, and designing a control pendant for an air-filled medical bed. He also worked as a plant engineer for General Motors. Table Of Contents Lab 1: Logic Gate Systems Lab 2: Older Generation Logic Gate Systems Versus CPLD Systems. Lab3: Flip Flop, Shift Registers, and Switch Bounce Lab 4: Serial and Parallel Data Transfer Systems. Lab 5: JK Flip Flop and Counter Fundamentals Lab 6: Digital Display Decoder System Lab 7: 1 of X Decoder And Encoder Systems Lab 8: Multiplexer and Demultiplexer Systems Lab 9: Matrix Keypad System Lab 10: Arithmetic Systems Lab 11: Memory System Fundamentals Lab 12: Liquid Crystal Displays (LCD) Appendix A: The Evolution Of ROM and RAM Appendix B: VHDL Design Guide Appendix C: FLEX Expansion Header Guide Appendix D: Forms And Guides For The DMD Lab 11 Project Appendix E: Summary Sheet for FLEX Designs: Using Lab 1 as a guide Appendix F: Altera Simulator Guide.
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